MARGO’s Learning Expedition to CppCon 2026: back from the world’s largest C++ gathering in Colorado, find our breakdown of major talks and a summary of the Lightning Talk presented by Louise Kraffe on the international stage.
MARGO at CppCon 2026: at the heart of the world’s largest C++ gathering
Every year in the United States, CppCon establishes itself as the absolute benchmark conference dedicated to the C++ language. For a full week, over a thousand developers, software architects, and tool designers gather. Indeed, this major event helps shape the future of the language and foster discussion on system architectures subject to high performance constraints.
CppCon 2026: C++ excellence in Learning Expedition
Embedded systems, high-frequency trading, robotics, or AI infrastructure: CppCon covers all domains where raw performance and low latency are critical.
experts & attendees
sessions & workshops
of technical immersion
On one hand, maintaining a level of excellence requires being present where the future of tech is decided. On the other hand, organizing our Learning Expeditions through our EXCELLENCE Hub fulfills a clear goal: confronting our experts with the world’s best specialists. Furthermore, we directly reinvest this added value into the core of our clients’ critical projects.
It is precisely within this dynamic that Louise Kraffe represented our teams in Colorado. In addition to attending conferences, she took the stage for a Lightning Talk. Her talk was dedicated to low latency data structures with the presentation of the HAMT (Hash Array Mapped Trie) algorithm.
CppCon 2026: technical report on C++ talks
1. Processor Design and C++ Memory Models
By Ofek Shilon — Technical summary
In ultra-low latency C++ applications, understanding simple language abstractions is no longer enough. Indeed, understanding the reality of the underlying hardware becomes essential. During his session, Ofek Shilon detailed the hardware mechanisms executed during memory accesses. He also demonstrated their direct impact on overall performance and code correctness.
The major takeaway: a memory access in C++ is never performed directly in RAM. In reality, it traverses multiple cache levels (L1/L2/L3).
- Caches & cache lines: caches handle fixed-size blocks, typically 64 bytes. An access crossing a cache line boundary may require handling two different lines and incur additional overhead.
- Memory alignment: dereferencing a pointer that does not respect alignment constraints can cause undefined behavior in C++. Nevertheless, the strategic use of
memcpyallows handling unaligned data safely. - Memory model & concurrency:
std::atomicandstd::memory_orderrely on hardware mechanisms such as cache coherence protocols, store buffers, invalidation queues, and, depending on the operations, memory barriers.
These mechanisms are particularly relevant in market finance systems subject to strict latency constraints. Indeed, a better understanding of the memory hierarchy allows designing cache-friendly structures. This effectively reduces cache-misses in low latency applications. However, any low-level optimization must be validated by precise measurements to avoid adding premature complexity.
2. Are You Smarter Than a Branch Predictor?
By Michelle D’Souza — Technical summary
Managing conditional branches (if, switch) is the subject of many misconceptions in C++. Michelle D’Souza therefore demystified the actual inner workings of branch predictors built into modern processors, such as TAGE or Perceptron predictors.
- Predictability vs “Branchless” Code: a misprediction forces the CPU to flush its speculative work, creating a real performance penalty. However, systematically eliminating branches via branchless code (such as
conditional moves) is not always faster and can even add unnecessary calculations. - Data organization: in certain scenarios, reorganizing or sorting data can transform hard-to-predict branches into more regular sequences that are easier for the processor to anticipate. The resulting gain must, however, be balanced against the cost of this reorganization.
- PGO (Profile-Guided Optimization): the compiler leverages profiles from representative executions to better optimize the paths actually taken: code layout, inlining decisions, branches, and other transformations.
3. When Zero-Cost Abstractions Aren’t Zero-Cost
By Steve Sorkin — Technical summary
Modern C++ highlights the principle of zero-cost abstractions. The idea is to use high-level constructs, such as templates or ranges, without suffering a performance penalty compared to low-level code. However, Steve Sorkin pointed out the nuanced reality behind this concept.
The major takeaway: a zero-cost abstraction is a conditional contract with the optimizer. It can be cost-free when the compiler has enough information about types and control flow to eliminate the abstraction layer.
- Dynamic dispatch & Type Erasure:
std::functioncan hide the concrete type of the callable from the compiler. In critical paths, this loss of information can prevent inlining and leave a runtime dispatch. - Ranges, Views & intermediate containers: although
std::rangesallows expressing processing declaratively, expressively, and composably, while potentially keeping lazy evaluation, the internal logic of iterators can remain in the generated assembly. Furthermore, breaking down processing by materializing intermediate containers causes real, highly costly dynamic allocations. - Limits of the
-O3optimization level: a high optimization level cannot reconstruct lost type information. Moreover, it can increase the size of the generated assembly and put pressure on the instruction cache.
4. From Profiling to Automatic Benchmarking
By Kris Jusiak — Technical summary
Optimizing complex code proves difficult due to biases induced by cache state, instruction layout, or branch predictor behavior. This is why Kris Jusiak proposed an automated methodology to overcome the limitations of traditional benchmarks.
- Microarchitectural measurement: leveraging hardware performance counters and the TMA (Top-Down Microarchitecture Analysis) method makes it possible to understand precisely why a CPU stalls.
- Investigation tooling: the methodology relies on a combined use of
perf,bpftrace,LLVM XRay,Intel PT, and assembly analyzers such asllvm-mca. - Automatic / Symbolic Benchmarking: the approach consists in automatically varying different microarchitectural conditions during testing to reduce certain measurement biases and obtain statistically more robust results.
Lightning Talk CppCon 2026: MARGO’s C++ expertise with Louise Kraffe
Beyond technology watch, MARGO actively encourages its consultants to speak at international gatherings. As such, Louise Kraffe took the stage to present a Lightning Talk focused on advanced data structures.
HAMT: The Hashmap without Rehashing
In C++, the standard structure std::unordered_map relies on a global hash table. When a rehash is necessary, the table rebuilds its bucket structure and redistributes elements according to the new capacity. This operation can introduce significant point-in-time overhead.
To overcome this constraint in real-time and low latency systems, Louise presented the HAMT (Hash Array Mapped Trie). It is a tree structure where the hash of a key is split into bit slices. This approach allows for progressive navigation through compact nodes using bitmasks (bitmaps).
- No global rehash: the structure grows locally during insertions, eliminating the source of latency spikes associated with full hash table rehashing.
- Compact memory management: using bitmaps ensures that only actually occupied locations in the tree are stored.
- Performance trade-offs: in the benchmarks presented,
std::unordered_mapachieves better average insertion times, whereas HAMT exhibits significantly lower tail latency as volume increases.
This topic directly illustrates certain challenges encountered in market finance systems, where latency stability can be as important as average performance.
MARGO x CppCon
High complexity standards serving our projects
This immersion at the heart of CppCon 2026 confirms an inescapable reality of modern software engineering: raw performance and reliability are not achieved by chance or simple intuition. Whether mastering processor memory architecture, anticipating branch predictor mechanics, uncovering the true cost of abstractions, or designing spike-resistant data structures like HAMT, every cycle gained requires an intimate understanding of the hardware.
At MARGO, attending these major international events is not a simple exercise in technology watch. It embodies the very essence of our EXCELLENCE Hub: confronting the strictest global standards to immediately reinvest this level of rigor at the core of our clients’ most critical IT systems in Investment Banking, Market Finance, and DeepTech.
What this expertise concretely brings to our projects:
- Surgical code quality: eliminating complex bottlenecks (cache-misses, superfluous dynamic allocations, dynamic indirection) right from the design phase.
- Absolute system predictability: mastering tail latency essential for real-time and market access environments.
- Proof-based methodology: replacing optimization guesswork with systematic measurement, microarchitectural profiling, and assembly code analysis.
Would you like to discuss our feedback or discover our C++ engineering opportunities?
What is CppCon and what is its role in the C++ ecosystem?
CppCon is the largest annual international conference dedicated to the C++ language. Held in the United States, it brings together over a thousand experts, compiler designers, and developers to discuss standard evolutions (C++20, C++23, C++26) and best practices for software performance.
Why is C++ memory model management critical for low latency systems?
In ultra-low latency applications, such as high-frequency trading, RAM is too slow. Understanding the C++ memory model allows aligning data with processor cache line sizes (64 bytes), reducing cache-misses and optimizing L1/L2/L3 cache memory usage.
What is a zero-cost abstraction in C++ and what are its limits?
A zero-cost abstraction is a high-level feature (such as templates or lambdas) that generates no execution overhead compared to hand-written low-level code. Its limitation occurs when the compiler loses visibility of the concrete type (e.g., with std::function), forcing a non-inlinable dynamic indirection.
Why use the HAMT structure rather than a standard std::unordered_map?
The std::unordered_map structure undergoes global rehash operations during resizes, creating unpredictable latency spikes. The HAMT (Hash Array Mapped Trie) grows locally without global rehashing, ensuring extremely stable insertion latency, essential for real-time systems.
What does profile-guided optimization (PGO) in C++ consist of?
PGO (Profile-Guided Optimization) is a technique where the compiler uses real execution data to reorganize assembly code. It optimizes the layout of conditional branches and function inlining along the most frequently executed code paths.
How does MARGO’s EXCELLENCE Hub support skill development in C++?
MARGO’s EXCELLENCE Hub organizes Learning Expeditions to global events like CppCon, funds at least one certifying training course per year, and provides hundreds of peer-coaching sessions. This enables our engineers to stay at the cutting edge of critical technologies for our enterprise clients.
